228 research outputs found

    Preface

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    Memory and Parallelism Analysis Using a Platform-Independent Approach

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    Emerging computing architectures such as near-memory computing (NMC) promise improved performance for applications by reducing the data movement between CPU and memory. However, detecting such applications is not a trivial task. In this ongoing work, we extend the state-of-the-art platform-independent software analysis tool with NMC related metrics such as memory entropy, spatial locality, data-level, and basic-block-level parallelism. These metrics help to identify the applications more suitable for NMC architectures.Comment: 22nd ACM International Workshop on Software and Compilers for Embedded Systems (SCOPES '19), May 201

    A Scenario-Aware Dataflow Programming Model

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    The FSM-SADF model of computation allows to find a tight bound on the throughput of firm real-time applications by capturing dynamic variations in scenarios. We explore an FSM-SADF programming model, and propose three different alternatives for scenario switching. The best candidate for our CompSOC platform was implemented, and experiments confirm that the tight throughput bound results in a reduced resource budget. This comes at the cost of a predictable overhead at run-time as well as increased communication and memory budgets. We show that design choices offer interesting trade-offs between run-time cost and resource budgets

    LEAPER: Fast and Accurate FPGA-based System Performance Prediction via Transfer Learning

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    Machine learning has recently gained traction as a way to overcome the slow accelerator generation and implementation process on an FPGA. It can be used to build performance and resource usage models that enable fast early-stage design space exploration. First, training requires large amounts of data (features extracted from design synthesis and implementation tools), which is cost-inefficient because of the time-consuming accelerator design and implementation process. Second, a model trained for a specific environment cannot predict performance or resource usage for a new, unknown environment. In a cloud system, renting a platform for data collection to build an ML model can significantly increase the total-cost-ownership (TCO) of a system. Third, ML-based models trained using a limited number of samples are prone to overfitting. To overcome these limitations, we propose LEAPER, a transfer learning-based approach for prediction of performance and resource usage in FPGA-based systems. The key idea of LEAPER is to transfer an ML-based performance and resource usage model trained for a low-end edge environment to a new, high-end cloud environment to provide fast and accurate predictions for accelerator implementation. Experimental results show that LEAPER (1) provides, on average across six workloads and five FPGAs, 85% accuracy when we use our transferred model for prediction in a cloud environment with 5-shot learning and (2) reduces design-space exploration time for accelerator implementation on an FPGA by 10x, from days to only a few hours

    Exploiting Spatial Redundancy of Image Sensor for Motion Robust rPPG

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    ReMeCo:Reliable Memristor-Based in-Memory Neuromorphic Computation

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    Memristor-based in-memory neuromorphic computing systems promise a highly efficient implementation of vector-matrix multiplications, commonly used in artificial neural networks (ANNs). However, the immature fabrication process of memristors and circuit level limitations, i.e., stuck-at-fault (SAF), IR-drop, and device-to-device (D2D) variation, degrade the reliability of these platforms and thus impede their wide deployment. In this paper, we present ReMeCo, a redundancy-based reliability improvement framework. It addresses the non-idealities while constraining the induced overhead. It achieves this by performing a sensitivity analysis on ANN. With the acquired insight, ReMeCo avoids the redundant calculation of least sensitive neurons and layers. ReMeCo uses a heuristic approach to find the balance between recovered accuracy and imposed overhead. ReMeCo further decreases hardware redundancy by exploiting the bit-slicing technique. In addition, the framework employs the ensemble averaging method at the output of every ANN layer to incorporate the redundant neurons. The efficacy of the ReMeCo is assessed using two well-known ANN models, i.e., LeNet, and AlexNet, running the MNIST and CIFAR10 datasets. Our results show 98.5% accuracy recovery with roughly 4% redundancy which is more than 20× lower than the state-of-the-art.</p

    Speckle Vibrometry for Instantaneous Heart Rate Monitoring

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    Instantaneous heart rate (IHR) has been investigated for sleep applications, such as sleep apnea detection and sleep staging. To ensure the comfort of the patient during sleep, it is desirable for IHR to be measured in a contact-free fashion. In this work, we use speckle vibrometry (SV) to perform on-skin and on-textile IHR monitoring in a sleep setting. Minute motions on the laser-illuminated surface can be captured by a defocused camera, enabling the detection of cardiac motions even on textiles. We investigate supine, lateral, and prone sleeping positions. Based on Bland–Altman analysis between SV cardiac measurements and electrocardiogram (ECG), with respect to each position, we achieve the best limits of agreement with ECG values of [−8.65, 7.79] bpm, [−9.79, 9.25] bpm, and [−10.81, 10.23] bpm, respectively. The results indicate the potential of using speckle vibrometry as a contact-free monitoring method for instantaneous heart rate in a setting where the participant is allowed to rest in a spontaneous position while covered by textile layers

    Multiconstraint Static Scheduling of Synchronous Dataflow Graphs Via Retiming and Unfolding

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